A System-on-a-Chip design may have a need for lower power consumption, multiple clock domains, and multiple power domains. These domains enable power reduction by switching off local supplies to eliminate leakage current, dynamically scaling voltages and clocks (especially in processing subsystems such as CPUs, GPUs and video engines) to optimize active power for operating conditions and altering IP core clocks to meet the needs of application usage scenarios. Nonetheless, the integrated-circuit-system-power-manager turns different functional blocks on and off to achieve some of the above functions, the communications network between different functional blocks is typically left powered on while these other functional blocks are put into a sleep mode or idle state. Typically, the system-power-manager controls activity in power domains in order to turn off or power on a given power domain.